Inventive concepts relate to a semiconductor device having a structure in which an insulating layer is formed under a metal interconnection, the metal interconnection formed on a via plug structure.
A 3-dimensional (3D) package technique in which a plurality of semiconductor chips are mounted in one package such as a multi-chip stacked package or a system in package is used.
A via plug structure vertically passing through a substrate (e.g. a die) is applied to implement a high-density, low-power, and high-speed thin-film 3D package.